L2S Talk by Dr Rajiv Joshi (T. J. Watson Research Center, IBM): Variability Aware Design in nm Era
14 August 2023, 13-14 h in H-C 7327
The talk is part of the ZESS lecture series and hosted by the DFG research unit “Learning to Sense” (L2S).
As the technology scales, process, voltage, and temperature, variations (PVT) and model inaccuracies impact design yield. In this talk, a predictive analytical technique based on statistical analysis methodology targeting both memory and custom logic design applications is highlighted. The methodology hinges on Mixture Important Sampling (MIS) is 5-6 orders of magnitude faster than Monte Carlo and a few orders compared to recent techniques. For advanced technologies, we extend the methodology to enable key features such as the Front End of the Line (FEOL) and back end of the line (BEOL) parasitic extraction and TCAD for manufacturability for 16nm and below. This increases the statistical confidence in the functionality and operability of the system- on-chip as a whole. The methodology is further extended to predict aging effects in memories and the utility of this technique is demonstrated through hardware fabrication.
Rajiv Joshi is a Mercator fellow at L2S. He holds a masters from MIT, doctorate from Columbia and has worked in IBM for almost 40 years now. His primary research has been in memory and recently big data analytics. He is also one of the drivers behind AI in Circuits and Systems conference.
